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Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
GENERAL DESCRIPTION
N-channel enhancement mode standard level field-effect power transistor in a plastic envelope suitable for surface mounting using 'trench' technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters and general purpose switching applications.
PHB24N03T
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 30 24 60 175 56 UNIT V A W C m
PINNING - SOT404
PIN 1 2 3 mb gate drain source drain DESCRIPTION
PIN CONFIGURATION
mb
SYMBOL
d
g
2 1 3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tmb = 25 C Tmb = 100 C Tmb = 25 C Tmb = 25 C MIN. - 55 MAX. 30 30 20 24 20 96 60 175 UNIT V V V A A A W C
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS pcb mounted, minimum footprint TYP. 50 MAX. 2.5 UNIT K/W K/W
ESD LIMITING VALUE
SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage, all pins CONDITIONS Human body model (100 pF, 1.5 k) MIN. MAX. 2 UNIT kV
September 1997
1
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
STATIC CHARACTERISTICS
Tj= 25C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55C VDS = VGS; ID = 1 mA Tj = 175C Tj = -55C VDS = 30 V; VGS = 0 V; VGS = 10 V; VDS = 0 V Tj = 175C MIN. 30 27 2.0 1.0 16 TYP. 3.0 0.05 0.02 50 -
PHB24N03T
MAX. 4.0 4.4 10 500 1 20 56 104
UNIT V V V V V A A A A V m m
Tj = 175C Gate source breakdown voltage IG = 1 mA; Drain-source on-state VGS = 10 V; ID = 25 A resistance VGS = 10 V; ID = 12 A; Tj = 175C
DYNAMIC CHARACTERISTICS
Tj = 25C unless otherwise specified SYMBOL gfs Qg(tot) Qgs Qgd Ciss Coss Crss td on tr td off tf Ld Ld Ls PARAMETER Forward transconductance Total gate charge Gate-source charge Gate-drain (Miller) charge Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 12 A ID = 10 A; VDD = 30 V; VGS = 10 V MIN. 2 TYP. 7.2 13 3.2 5.4 385 152 85 9 40 15 20 3.5 4.5 7.5 MAX. UNIT S nC nC nC pF pF pF ns ns ns ns nH nH nH
VGS = 0 V; VDS = 25 V; f = 1 MHz
VDD = 30 V; ID = 25 A; VGS = 10 V; RG = 10 Resistive load Measured from tab to centre of die Measured from drain lead solder point to centre of die Measured from source lead solder point to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 25 A; -dIF/dt = 100 A/s; VGS = 0 V; VR = 25 V TYP. 0.99 154 0.5 MAX. 24 96 1.2 UNIT A A V ns C
September 1997
2
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
AVALANCHE LIMITING VALUE
SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 12 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tmb = 25 C MIN. TYP. -
PHB24N03T
MAX. 15
UNIT mJ
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
100
ID, Drain current (Amps)
V )= DS /ID
PHP24N03T
RD
S(
ON
10 us
100 us 10 DC 1 ms 10 ms Tmb = 25 C
0
20
40
60
80 100 Tmb / C
120
140
160
180
1
1
10 VDS, Drain-source voltage (Volts)
100
Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tmb)
Normalised Current Derating
Fig.3. Safe operating area. Tmb = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp
Transient thermal impedance, Zth j-mb (K/W) PHP24N03T
120 110 100 90 80 70 60 50 40 30 20 10 0
ID%
10
D= 1 0.5 0.2 0.1 0.05 0.1 0.02
P D tp D= tp T t
0
T
0.01
0
20
40
60
80 100 Tmb / C
120
140
160
180
1us
10us 100us 1ms 10ms pulse width, tp (s)
0.1s
1s
10s
Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 10 V
Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T
September 1997
3
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
PHB24N03T
20
ID, Drain current (Amps) 10 V 20 V
PHP24N03T 6.5 V Tj = 25 C 6V
10
Transconductance, gfs (S) VDS = 30 V
PHP24N03T
8 Tj = 25 C 6
15
10
5.5 V
5V 5 4.5 V VGS = 4 V 0 0 5 10 15 20 VDS, Drain-Source voltage (Volts) 25 30
4
175 C
2
0
0
5
10 Drain current, ID (A)
15
20
Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS
RDS(on), Drain-Source on resistance (Ohms) VGS = 4 V 4.5 V 5V
PHP24N03T
Fig.8. Typical transconductance, Tj = 25 C. gfs = f(ID)
a 2
0.2
30V TrenchMOS
5.5 V
0.15
1.5
0.1
1
Tj = 25 C
0.05
10 V 20 V
0.5
0
0
5
10 15 ID, Drain current (Amps)
20
0 -100
-50
0
50 Tj / C
100
150
200
Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS
Drain current, ID (A)
VDS = 30 V
Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 12 A; VGS = 10 V
VGS(TO) / V max. 4
BUK759-60
15
PHP24N03T
5
10
typ. 3 min. 2
5 175 C Tj = 25 C
1
0
0
2
4 6 Gate-source voltage, VGS (V)
8
10
0 -100
-50
0
50 Tj / C
100
150
200
Fig.7. Typical transfer characteristics. ID = f(VGS); parameter Tj
Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
September 1997
4
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
PHB24N03T
1E-01
Sub-Threshold Conduction
20
Source-Drain diode current, IF(A) VGS = 0 V
PHP24N03T
1E-02 2% typ 98%
15
1E-03
10 175 C Tj = 25 C
1E-04
5
1E-05
0
1E-06
0
0.2
0
1
2
3
4
5
0.4 0.6 0.8 1 Source-Drain voltage, VSDS (V)
1.2
1.4
Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS
Capacitances, Ciss, Coss, Crss (pF) PHP24N03T
Fig.14. Typical reverse diode current. IF = f(VSDS); parameter Tj
WDSS%
1000
120 110 100
Ciss
90 80 70 60 50 40 30 20 10 0
Coss 100 Crss
10
1
10 Drain-source voltage, VDS (V)
100
20
40
60
80
100 120 Tmb / C
140
160
180
Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb)
20
VGS, Gate-Source voltage (Volts) VDD = 30 V ID = 10 A Tj = 25 C
PHP24N03T
+
L VDS
VDD
15
10
VGS 0 T.U.T.
-ID/100
5
RGS
0
R 01 shunt
0
5
10 15 Qg, Gate charge (nC)
20
25
Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); parameter VDS
Fig.16. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS - VDD )
September 1997
5
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
MECHANICAL DATA
Dimensions in mm Net Mass: 1.4 g
10.3 max 4.5 max 1.4 max
PHB24N03T
11 max 15.4
2.5 0.85 max (x2) 2.54 (x2)
0.5
Fig.17. SOT404 : centre pin connected to mounting base.
MOUNTING INSTRUCTIONS
Dimensions in mm
11.5
9.0
17.5 2.0
3.8
5.08
Fig.18. SOT404 : soldering pattern for surface mounting.
Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Epoxy meets UL94 V0 at 1/8".
September 1997
6
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOSTM transistor Standard level FET
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values
PHB24N03T
This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
September 1997
7
Rev 1.100

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